计算机科学论文代写 User Interfaces Ic Compiler
计算机科学论文代写 User Interfaces Ic Compiler
4.4.4 Annotating the Physical Data
IC Compiler provides several methods of annotating physical data on the design:
• Reading the physical data from a DEF file
To read a DEF file, use the read_def command (or choose File > Import > Read DEF in
the GUI).
icc_shell> read_def -allow_physical design_name.def
• Reading the physical data from a floorplan file
A floorplan file is a file that you previously created by using the write_floorplan
command (or by choosing Floorplan > Write Floorplan in the GUI).
icc_shell> read_floorplan floorplan_file_name
• Copying the physical data from another design
To copy physical data from the layout (CEL) view of one design in the current Milkyway design library to another, use the copy_floorplan command (or choose Floorplan > Copy Floorplan in the GUI). [16]
icc_shell> copy_floorplan -from design1
4.4.5 Preparing for Timing Analysis and RC Calculation
IC Compiler provides RC calculation technology and timing analysis capabilities for both
preroute and postroute data. Before you perform RC calculation and timing analysis, you
must complete the following tasks:
• Set up the TLUPlus files
You specify these files by using the set_tlu_plus_files command (or by choosing File
> Set TLU+ in the GUI).
icc_shell> set_tlu_plus_files \
-tech2itf_map ./path/map_file_name.map \
-max_tluplus ./path/worst_settings.tlup \
-min_tluplus ./path/best_settings.tlup
• (Optional) Back-annotate delay or parasitic data
To back-annotate the design with delay information provided in a Standard Delay Format (SDF) file, use the read_sdf command (or choose File > Import > Read SDF in the GUI).
To remove annotated data from design, use the remove_annotations command.
• Set the timing constraints
At a minimum, the timing constraints must contain a clock definition for each clock signal, as well as input and output arrival times for each I/O port. This requirement ensures that all signal paths are constrained for timing.
To read a timing constraints file, use the read_sdc command (or choose File > Import >
Read SDC in the GUI).
icc_shell> read_sdc -version 1.7 design_name.sdc
• Specify the analysis mode
Conditions such as fabrication process, operating temperature, and power supply voltage can vary semiconductor device parameters. You can specify the operating conditions for analysis with the set_operating_conditions command.
• (Optional) Set the derating factors
If your timing library does not include minimum and maximum timing data, you can perform simultaneous minimum and maximum timing analysis by specifying derating factors for your timing library. Use the set_timing_derate command to specify the derating factors.
• Select the delay calculation algorithm
By default, IC Compiler uses Elmore delay calculation for both preroute and postroute delay calculations. For postroute delay calculations, you can choose to use Arnoldi delay calculation either for clock nets only or for all nets. Elmore delay calculation is faster, but its results do not always correlate with the PrimeTime and PrimeTime SI results. The Arnoldi calculation is best used for designs with smaller geometries and high resistive nets, but it requires more runtime and memory. [16]
4.4.6 Saving the Design
To save the design in Milkyway format, use the save_mw_cel command (or choose File > Save Design in the GUI). [16]